_bytee
a_aPORT
clock0INSTD_LOGIC
faddress_aINSTD_LOGIC_VECTOR7DOWNTO0q_aENDCOMPONENTOUTSTD_LOGIC_VECTOR7DOWNTO0
BEGINqsub_wire07DOWNTO0
altsy
cram_compo
e
taltsy
cramGENERICMAPclock_e
able_i
put_a